数电单词中英对照表
| 英文单词 | 中文 | 英文解释 | 中文解释 |
|---|---|---|---|
| *A* | |||
| Address | 地址 | The location of a given storage cell or group of cells in a memory | 内存中给定存储单元或一组单元的位置 |
| Aliasing | 混叠 | The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency when the signal is recovered. | 当信号以低于信号频率两倍的速率采样时产生的效应,混叠会在信号恢复时产生干扰频率 |
| Analog | 模拟 | Being continuous or having continuous values | 连续的或具有连续值 |
| Analog-to-digital converter (ADC) | 模数转换器 | A circuit used to convert an analog signal to digital form | 用于将模拟信号转换为数字形式的电路 |
| AND | 与 | A basic logic operation in which a true (HIGH) output occurs only when all input conditions are true (HIGH) | 一种基本逻辑操作,仅当所有输入条件为真(高电平)时输出才为真(高电平) |
| AND gate | 与门 | A logic gate that produces a HIGH output only when all of the inputs are HIGH | 仅当所有输入为高电平时输出高电平的逻辑门 |
| Astable | 无稳态 | Having no stable state. An astable multivibrator oscillates between two quasi-stable states | 没有稳定状态,无稳态多谐振荡器在两个准稳态之间振荡 |
| Asynchronous | 异步 | Not occurring at the same time | 不同时发生 |
| *B* | |||
| BCD | 二进制编码的十进制 | Binary coded decimal; a digital code in which each of the decimal digits, 0 through 9, is represented by a group of four bits | 二进制编码的十进制,一种数字代码,其中每个十进制数字(0到9)由四位二进制数表示 |
| Bidirectional | 双向 | Having two directions. In a bidirectional shift register, the stored data can be shifted right or left | 具有两个方向,双向移位寄存器中存储的数据可以向左或向右移动 |
| Binary | 二进制 | Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits | 具有两个值或状态,描述以二为基数并使用1和0作为数字的数字系统 |
| Bipolar | 双极型 | A class of integrated logic circuits implemented with bipolar transistors; also known as TTL | 用双极晶体管实现的集成逻辑电路类别,也称为TTL |
| Bistable | 双稳态 | Having two stable states. Flip-flops and latches are bistable multivibrators | 具有两个稳定状态,触发器和锁存器是双稳态多谐振荡器 |
| Bit | 位 | A binary digit, which can be a 1 or a 0 | 二进制数字,可以是1或0 |
| Boolean algebra | 布尔代数 | The mathematics of logic circuits | 逻辑电路的数学 |
| Bus | 总线 | One or more interconnections that interface one or more devices based on a standardized specification | 基于标准化规范连接一个或多个设备的互连 |
| Byte | 字节 | A group of eight bits | 八位二进制数 |
| *C* | |||
| Capacity | 容量 | The total number of data units (bits, nibbles, bytes, words) that a memory can store | 内存可以存储的数据单元(位、半字节、字节、字)总数 |
| Cascade | 级联 | To connect “end-to-end” as when several counters are connected from the terminal count output of one counter to the enable input of the next counter | 将多个计数器从终端计数输出连接到下一个计数器的使能输入,实现“端到端”连接 |
| Cascading | 级联 | Connecting two or more similar devices in a manner that expands the capability of one device | 以扩展设备功能的方式连接两个或多个类似设备 |
| Cell | 单元 | A single storage element in a memory | 内存中的单个存储元素 |
| Clear | 清除 | An asynchronous input used to reset a flip-flop (make the Q output 0) | 用于复位触发器(使Q输出为0)的异步输入 |
| Clock | 时钟 | A basic timing signal in a digital system; a periodic waveform used to synchronize actions | 数字系统中的基本定时信号,用于同步操作的周期性波形 |
| CMOS | 互补金属氧化物半导体 | Complementary metal-oxide semiconductor; a type of integrated logic circuit that uses n- and p-channel MOSFETs (metal-oxide semiconductor field-effect transistors) | 互补金属氧化物半导体,一种使用n沟道和p沟道MOSFET的集成逻辑电路 |
| Complement | 补码 | The inverse or opposite of a number. In Boolean algebra, the inverse function, expressed with a bar over a variable. The complement of a 1 is 0, and vice versa | 数字的反或逆,布尔代数中用变量上方的横线表示反函数,1的补码是0,反之亦然 |
| Current sinking | 电流吸收 | The action of a logic circuit in which it accepts current into its output from a load | 逻辑电路从负载吸收电流到其输出的动作 |
| Current sourcing | 电流供给 | The action of a logic circuit in which it sends current from its output to a load | 逻辑电路从其输出向负载供给电流的动作 |
| *D* | |||
| Data | 数据 | Information in numeric, alphabetic, or other form | 数字、字母或其他形式的信息 |
| Decade | 十进制 | Characterized by ten states or values | 以十个状态或值为特征 |
| Decoder | 解码器 | A digital circuit that converts coded information into a familiar or noncoded form | 将编码信息转换为熟悉或非编码形式的数字电路 |
| Demultiplexer (DEMUX) | 解复用器 | A circuit that switches digital data from one input line to several output lines in a specified time sequence | 在指定时间序列中将数字数据从一个输入线切换到多个输出线的电路 |
| D flip-flop | D触发器 | A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse | 一种双稳态多谐振荡器,输出在时钟脉冲的触发沿上呈现D输入的状态 |
| Digital | 数字 | Related to digits or discrete quantities; having a set of discrete values | 与数字或离散量相关,具有一组离散值 |
| Digital-to-analog converter (DAC) | 数模转换器 | A circuit used to convert the digital representation of an analog signal back to the analog signal | 用于将模拟信号的数字表示转换回模拟信号的电路 |
| “Don’t care” | 无关项 | A combination of input literals that cannot occur and can be used as a 1 or a 0 on a Karnaugh map for simplification | 输入变量的组合不可能出现,可以在卡诺图中用作1或0以简化逻辑 |
| DRAM | 动态随机存取存储器 | Dynamic random-access memory. A type of semiconductor memory that uses capacitors as the storage elements and it is a volatile, read/write memory | 动态随机存取存储器,一种使用电容器作为存储元件的半导体存储器,易失性读写存储器 |
| DSP | 数字信号处理器 | Digital signal processor. A special type of microprocessor that processes data in real time | 数字信号处理器,一种实时处理数据的特殊微处理器 |
| Duty cycle | 占空比 | The ratio of the pulse width to the period of a digital waveform, expressed as a percentage | 数字波形的脉冲宽度与周期的比率,以百分比表示 |
| *E* | |||
| Edge-triggered flip-flop | 边沿触发器 | A type of flip-flop in which the data are entered and appear on the output on the same clock edge | 一种触发器,数据在同一时钟边沿输入并出现在输出端 |
| Enable | 使能 | To activate or put into an operational mode; an input on a logic circuit that enables its operation | 激活或进入操作模式,逻辑电路上使其操作的输入 |
| Encoder | 编码器 | A digital circuit that converts information to a coded form | 将信息转换为编码形式的数字电路 |
| EPROM | 可擦除可编程只读存储器 | Erasable programmable read-only memory; a type of semiconductor memory device that typically uses ultraviolet light to erase data | 可擦除可编程只读存储器,一种通常使用紫外线擦除数据的半导体存储器 |
| Exclusive-NOR (XNOR) gate | 同或门 | A logic gate that produces a LOW only when the two inputs are at opposite levels | 仅当两个输入电平相反时输出低电平的逻辑门 |
| Exclusive-OR (XOR) gate | 异或门 | A logic gate that produces a HIGH output only when its two inputs are at opposite levels | 仅当两个输入电平相反时输出高电平的逻辑门 |
| *F* | |||
| Fan-out | 扇出 | The number of equivalent gate inputs of the same family series that a logic gate can drive | 逻辑门可以驱动的同系列等效门输入的数量 |
| Fixed-function logic | 固定功能逻辑 | A category of digital integrated circuits having functions that cannot be altered | 功能不可更改的数字集成电路类别 |
| Flash memory | 闪存 | A nonvolatile read/write random-access semiconductor memory in which data are stored as charge on the floating gate of a certain type of FET | 非易失性读写随机存取半导体存储器,数据存储在某种类型FET的浮栅上 |
| Full-adder | 全加器 | A digital circuit that adds two bits and an input carry to produce a sum and an output carry | 将两个位和一个输入进位相加以产生和与输出进位的数字电路 |
| *G* | |||
| Gate | 门 | A logic circuit that performs a basic logic operation such as AND or OR | 执行基本逻辑操作(如与或或)的逻辑电路 |
| Glitch | 毛刺 | A voltage or current spike of short duration, usually unintentionally produced and unwanted | 短时电压或电流尖峰,通常是无意产生且不需要的 |
| *H* | |||
| Half-adder | 半加器 | A digital circuit that adds two bits and produces a sum and an output carry. It cannot handle input carries | 将两个位相加并产生和与输出进位的数字电路,不能处理输入进位 |
| Hexadecimal | 十六进制 | Describes a number system with a base of 16 | 描述以16为基数的数字系统 |
| Hold time | 保持时间 | The time interval required for the control levels to remain on the inputs to a flip-flop after the triggering edge of the clock in order to reliably activate the device | 时钟触发沿后控制电平需要在触发器输入上保持的时间间隔,以确保设备可靠激活 |
| *I* | |||
| Input | 输入 | The signal or line going into a circuit | 进入电路的信号或线路 |
| Integrated circuit (IC) | 集成电路 | A type of circuit in which all of the components are integrated on a single chip of semi-conductive material of extremely small size | 所有组件集成在极小的半导体材料芯片上的电路 |
| Inverter | 反相器 | A NOT circuit; a circuit that changes a HIGH to a LOW or vice versa | 非门电路,将高电平变为低电平或反之的电路 |
| *K* | |||
| Karnaugh map | 卡诺图 | An arrangement of cells representing the combinations of literals in a Boolean expression and used for a systematic simplification of the expression | 表示布尔表达式中变量组合的单元格排列,用于系统化简化表达式 |
| *L* | |||
| Latch | 锁存器 | A bistable digital circuit used for storing a bit | 用于存储一位的双稳态数字电路 |
| Load | 加载 | To enter data into a shift register | 将数据输入移位寄存器 |
| Logic | 逻辑 | In digital electronics, the decision-making capability of gate circuits, in which a HIGH represents a true statement and a LOW represents a false one | 数字电子中门电路的决策能力,高电平表示真命题,低电平表示假命题 |
| Look-ahead carry | 超前进位 | A method of binary addition whereby carries from preceding adder stages are anticipated, thus eliminating carry propagation delays | 一种二进制加法方法,通过预测前级加法器的进位来消除进位传播延迟 |
| LSB | 最低有效位 | Least significant bit; the right-most bit in a binary whole number or code | 最低有效位,二进制整数或代码中最右边的位 |
| *M* | |||
| Memory | 存储器 | The portion of a computer or other system that stores binary data | 计算机或其他系统中存储二进制数据的部分 |
| Minimization | 最小化 | The process that results in an SOP or POS Boolean expression that contains the fewest possible literals per term | 生成包含最少变量的SOP或POS布尔表达式的过程 |
| Modulus | 模数 | The number of unique states through which a counter will sequence | 计数器将遍历的唯一状态数 |
| Monostable | 单稳态 | Having only one stable state. A monostable multivibrator, commonly called a one-shot, produces a single pulse in response to a triggering input | 只有一个稳定状态,单稳态多谐振荡器(通常称为单稳态触发器)在触发输入时产生单个脉冲 |
| MSB | 最高有效位 | Most significant bit; the left-most bit in a binary whole number or code | 最高有效位,二进制整数或代码中最左边的位 |
| Multiplexer (MUX) | 多路复用器 | A circuit that switches digital data from several input lines onto a single output line in a specified time sequence | 在指定时间序列中将数字数据从多个输入线切换到单个输出线的电路 |
| *N* | |||
| NAND gate | 与非门 | A logic gate that produces a LOW output only when all the inputs are HIGH | 仅当所有输入为高电平时输出低电平的逻辑门 |
| Negative-AND | 负与 | The dual operation of a NOR gate when the inputs are active-LOW | 当输入为低电平有效时,NOR门的对偶操作 |
| Negative-OR | 负或 | The dual operation of a NAND gate when the inputs are active-LOW | 当输入为低电平有效时,NAND门的对偶操作 |
| Node | 节点 | A common connection point in a circuit in which a gate output is connected to one or more gate inputs | 电路中门输出连接到一个或多个门输入的公共连接点 |
| Noise immunity | 抗噪性 | The ability of a logic circuit to reject unwanted signals (noise) | 逻辑电路抑制不需要的信号(噪声)的能力 |
| Noise margin | 噪声容限 | The difference between the maximum LOW output of a gate and the maximum acceptable LOW input of an equivalent gate; also, the difference between the minimum HIGH output of a gate and the minimum HIGH input of an equivalent gate. Noise margin is sometimes expressed as a percentage of the dc supply voltage | 门的最大低电平输出与等效门的最大可接受低电平输入之间的差值;或门的最小高电平输出与等效门的最小高电平输入之间的差值。噪声容限有时以直流电源电压的百分比表示 |
| NOR gate | 或非门 | A logic gate in which the output is LOW when one or more of the inputs are HIGH | 当一个或多个输入为高电平时输出低电平的逻辑门 |
| NOT | 非 | A basic logic operation that performs inversions | 执行反转的基本逻辑操作 |
| Nyquist frequency | 奈奎斯特频率 | The highest signal frequency that can be sampled at a specified sampling frequency; a frequency equal to or less than half the sampling frequency | 在指定采样频率下可以采样的最高信号频率,等于或小于采样频率的一半 |
| *O* | |||
|---|---|---|---|
| Octal | 八进制 | Describes a number system with a base of eight | 描述以8为基数的数字系统 |
| One-shot | 单稳态触发器 | A monostable multivibrator | 单稳态多谐振荡器 |
| Open-collector | 集电极开路 | A type of output for a TTL circuit in which the collector of the output transistor is left internally disconnected and is available for connection to an external load that requires relatively high current or voltage | TTL电路的一种输出类型,输出晶体管的集电极内部断开,可用于连接需要较高电流或电压的外部负载 |
| OR | 或 | A basic logic operation in which a true (HIGH) output occurs when one or more of the input conditions are true (HIGH) | 一种基本逻辑操作,当一个或多个输入条件为真(高电平)时输出为真(高电平) |
| OR gate | 或门 | A logic gate that produces a HIGH output when one or more inputs are HIGH | 当一个或多个输入为高电平时输出高电平的逻辑门 |
| Output | 输出 | The signal or line coming out of a circuit | 从电路输出的信号或线路 |
| *P* | |||
| Parallel | 并行 | In digital systems, data occurring simultaneously on several lines; the transfer or processing of several bits simultaneously | 数字系统中数据同时在多条线上出现;同时传输或处理多个位 |
| Parity | 奇偶校验 | In relation to binary codes, the condition of evenness or oddness of the number of 1s in a code group | 与二进制代码相关,代码组中1的数量的奇偶性 |
| Parity bit | 奇偶校验位 | A bit attached to each group of information bits to make the total number of 1s odd or even for every group of bits | 附加到每组信息位上的位,使每组位的1的总数为奇数或偶数 |
| Preset | 预置 | An asynchronous input used to set a flip-flop (make the Q output 1) | 用于设置触发器(使Q输出为1)的异步输入 |
| Priority encoder | 优先编码器 | An encoder in which only the highest value input digit is encoded and any other active input is ignored | 仅对最高值输入数字进行编码并忽略其他有效输入的编码器 |
| Product-of-sums (POS) | 和之积 | A form of Boolean expression that is basically the ANDing of ORed terms | 布尔表达式的一种形式,基本上是或项的与操作 |
| Product term | 乘积项 | The Boolean product of two or more literals equivalent to an AND operation | 两个或多个变量的布尔乘积,等价于与操作 |
| Programmable logic | 可编程逻辑 | A category of digital integrated circuits capable of being programmed to perform specified functions | 可编程以执行特定功能的数字集成电路类别 |
| PROM | 可编程只读存储器 | Programmable read-only memory; a type of semiconductor memory | 可编程只读存储器,一种半导体存储器 |
| Propagation delay time | 传播延迟时间 | The time interval between the occurrence of an input transition and the occurrence of the corresponding output transition in a logic circuit | 逻辑电路中输入转换发生与相应输出转换发生之间的时间间隔 |
| Pull-up resistor | 上拉电阻 | A resistor with one end connected to the dc supply voltage used to keep a given point in a logic circuit HIGH when in the inactive state | 一端连接到直流电源电压的电阻,用于在逻辑电路不活动时保持某点为高电平 |
| Pulse | 脉冲 | A sudden change from one level to another, followed after a time, called the pulse width, by a sudden change back to the original level | 从一个电平突然变化到另一个电平,经过一段时间(称为脉冲宽度)后突然回到原始电平 |
| *Q* | |||
| Quantization | 量化 | The process whereby a binary code is assigned to each sampled value during analog-to-digital conversion | 在模数转换过程中为每个采样值分配二进制代码的过程 |
| *R* | |||
| RAM | 随机存取存储器 | Random-access memory; a volatile read/write semiconductor memory | 随机存取存储器,易失性读写半导体存储器 |
| Read | 读取 | The process of retrieving data from a memory | 从存储器中检索数据的过程 |
| Recycle | 循环 | To undergo transition (as in a counter) from the final or terminal state back to the initial state | 从最终或终止状态转换回初始状态(如计数器) |
| Register | 寄存器 | One or more flip-flops used to store and shift data | 用于存储和移位数据的一个或多个触发器 |
| RESET | 复位 | The state of a flip-flop or latch when the output is 0; the action of producing a RESET state | 触发器或锁存器输出为0的状态;产生复位状态的动作 |
| Ripple carry | 行波进位 | A method of binary addition in which the output carry from each adder becomes the input carry of the next higher-order adder | 一种二进制加法方法,每个加法器的输出进位成为下一个高位加法器的输入进位 |
| ROM | 只读存储器 | Read-only memory; a nonvolatile random-access semiconductor memory | 只读存储器,非易失性随机存取半导体存储器 |
| *S* | |||
| Sampling | 采样 | The process of taking a sufficient number of discrete values at points on a waveform that will define the shape of the waveform | 在波形上取足够多的离散值以定义波形形状的过程 |
| Serial | 串行 | Having one element following another, as in a serial transfer of bits; occurring in sequence rather than simultaneously | 一个元素跟随另一个元素,如位的串行传输;按顺序发生而非同时 |
| SET | 置位 | The state of a flip-flop or latch when the output is 1; the action of producing a SET state | 触发器或锁存器输出为1的状态;产生置位状态的动作 |
| Set-up time | 建立时间 | The time interval required for the control levels to be on the inputs to a digital circuit, such as a flip-flop, prior to the triggering edge of a clock pulse | 在时钟脉冲触发沿之前,数字电路(如触发器)输入上的控制电平需要保持的时间间隔 |
| SRAM | 静态随机存取存储器 | Static random-access memory; a type of volatile read/write semiconductor memory | 静态随机存取存储器,一种易失性读写半导体存储器 |
| Stage | 级 | One storage element in a register | 寄存器中的一个存储元素 |
| State diagram | 状态图 | A graphic depiction of a sequence of states or values | 状态或值序列的图形描述 |
| State machine | 状态机 | A logic system or circuit exhibiting a sequence of states conditioned by internal logic and external inputs; any sequential circuit exhibiting a specified sequence of states | 由内部逻辑和外部输入决定状态序列的逻辑系统或电路;任何表现出特定状态序列的时序电路 |
| Sum-of-products (SOP) | 积之和 | A form of Boolean expression that is basically the ORing of ANDed terms | 布尔表达式的一种形式,基本上是与项的或操作 |
| Sum term | 和项 | The Boolean sum of two or more literals equivalent to an OR operation | 两个或多个变量的布尔和,等价于或操作 |
| Synchronous | 同步 | Occurring at the same time | 同时发生 |
| *T* | |||
| Terminal count | 终止计数 | The final state in a counter’s sequence | 计数器序列中的最终状态 |
| Timer | 定时器 | A circuit that can be used as a one-shot or as an oscillator | 可用作单稳态触发器或振荡器的电路 |
| Timing diagram | 时序图 | A graph of digital waveforms showing the time relationship of two or more waveforms | 显示两个或多个波形时间关系的数字波形图 |
| Toggle | 翻转 | The action of a flip-flop when it changes state on each clock pulse | 触发器在每个时钟脉冲上改变状态的动作 |
| Totem pole | 图腾柱 | A type of output in TTL circuits | TTL电路的一种输出类型 |
| Tristate | 三态 | A type of output in logic circuits that exhibits three states: HIGH, LOW, and high-Z | 逻辑电路的一种输出类型,具有三种状态:高电平、低电平和高阻态 |
| Truth table | 真值表 | A table showing the inputs and corresponding output(s) of a logic circuit | 显示逻辑电路输入和相应输出的表格 |
| TTL | 晶体管-晶体管逻辑 | Transistor-transistor logic; a type of integrated circuit that uses bipolar junction transistors. Also called bipolar | 晶体管-晶体管逻辑,一种使用双极结型晶体管的集成电路,也称为双极型 |
| *U* | |||
| Unit load | 单位负载 | A measure of fan-out. One gate input represents a unit load to a driving gate | 扇出的度量,一个门输入代表驱动门的一个单位负载 |
| Universal gate | 通用门 | Either a NAND gate or a NOR gate. The term universal refers to the property of a gate that permits any logic function to be implemented by that gate or by a combination of that kind | 与非门或或非门,通用指门可以通过自身或组合实现任何逻辑功能的特性 |
| *V* | |||
| Variable | 变量 | A symbol used to represent an action, a condition, or data that can have a value of 1 or 0, usually designated by an italic letter or word | 用于表示动作、条件或数据的符号,其值为1或0,通常用斜体字母或单词表示 |
| *W* | |||
| Word | 字 | A group of bits or bytes that acts as a single entity that can be stored in one memory location | 作为单个实体可以存储在一个内存位置中的一组位或字节 |
| Write | 写入 | The process of storing data in a memory | 在内存中存储数据的过程 |
数电单词中英对照表
https://blog.ijune.cn/posts/1546796794/